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Memory Module Specifications

VALUERAM0886-001.A00 02/02/10 Page 1

This document describes ValueRAM's 4GB (512M x 72-bit) PC2-5300 CL5 SDRAM (Synchronous DRAM) "fully

buffered" ECC "dual rank" memory module. This module is based on eighteen stacked 512M x 4-bit (thirty-six 256M

x 4-bit) 667MHz DDR2 FBGA components. The module also includes an AMB device (Advanced Memory Buffer).

The electrical and mechanical specifications are as follows:

Description:

KVR667D2D4F5/4GEF

4GB 512M x 72-Bit PC2-5300

CL5 ECC 240-Pin FBDIMM

· FBDIMM Module: 240-pin

· JEDEC Standard: R/C H or E

· Memory Organization: 2 rank of x4 devices

· DDR2 DRAM Interface: SSTL_18

· DDR2 Speed Grade: 667 Mbps

· CAS Latency: 5-5-5

· Module Bandwidth: 5.3 GB/s

· DRAM: VDD = VDDQ = 1.8V

· AMB: VCC = VCCFBD = 1.5V

· EEPROM: VDDSPD = 3.3V (typical)

· Heat Spreader: Full DIMM Heat Spreader (FDHS)

· PCB Height: 30.35mm, double-side

· RoHS Compliant

Feature:

DRAM Supported:

Elpida F-die

1 2 3 4 5 6 7

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Pagina 1 - Memory Module Specifications

Memory Module SpecificationsVALUERAM0886-001.A00 02/02/10 Page 1This document describes ValueRAM's 4GB (512M x 72-bit) PC2-5300 CL5 SDRAM (Synchr

Pagina 2 - DDR2 240-pin FBDIMM Pinout:

DDR2 240-pin FBDIMM Pinout:Pin#FrontSidePin#BackSidePin#FrontSidePin#BackSidePin#FrontSidePin#BackSidePin#FrontSidePin#BackSide1VDD121VDD31 PN3 151 SN

Pagina 3 - Absolute Maximum Ratings

DIMM Connector Pin Description:Pin Name Pin Description CountSCKSystem Clock Input, positive line11SCKSystem Clock Input, negative line11PN[13:0] Prim

Pagina 4 - Functional Block Diagram:

VALUERAM0886-001.A00 Page 4TECHNOLOGYFunctional Block Diagram:S0DQS0VSSNotes:1. DQ-to-I/O wiring may be changed within a nibble2. There are two physic

Pagina 5 - Architecture:

VALUERAM0886-001.A00 Page 5TECHNOLOGYArchitecture:Advanced Memory Buffer Pin Description:Pin Name Pin Description CountFB-DIMM Channel Signals99SCK Sy

Pagina 6 - Power/Ground Signals

VALUERAM0886-001.A00 Page 6TECHNOLOGYSPD Bus Interface Signals5SCL Serial Presence Detect (SPD) Clock Input 1SDA SPD Data Input / Output 1SA[2:0] SPD

Pagina 7 - Package Dimensions:

VALUERAM0886-001.A00 Page 7TECHNOLOGYPackage Dimensions:Units: inches (millimeters)TECHNOLOGYAMBAdvanced Memory BufferDetail A0.047 (1.19)0.042 (1.06)

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